DPDK  26.03.0
rte_pmd_cnxk.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2022 Marvell.
3  */
4 
11 #ifndef _PMD_CNXK_H_
12 #define _PMD_CNXK_H_
13 
14 #include <rte_compat.h>
15 #include <rte_ethdev.h>
16 #include <rte_ether.h>
17 #include <rte_security.h>
18 
48 };
49 
60 };
61 
65  uint64_t enc_pkts;
67  uint64_t enc_bytes;
69  uint64_t dec_pkts;
71  uint64_t dec_bytes;
72 };
73 
74 struct rte_pmd_cnxk_sec_action {
76  uint32_t sa_index;
78  bool sa_xor;
80  uint16_t sa_hi, sa_lo;
85  bool is_non_inp;
86 };
87 
88 #define RTE_PMD_CNXK_CTX_MAX_CKEY_LEN 32
89 #define RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN 128
90 
92 #define RTE_PMD_CNXK_AR_WIN_SIZE_MIN 64
93 #define RTE_PMD_CNXK_AR_WIN_SIZE_MAX 4096
94 #define RTE_PMD_CNXK_LOG_MIN_AR_WIN_SIZE_M1 5
95 
97 #define RTE_PMD_CNXK_AR_WINBITS_SZ (RTE_ALIGN_CEIL(RTE_PMD_CNXK_AR_WIN_SIZE_MAX, 64) / 64)
98 
101  struct {
103  uint32_t dst_addr;
105  uint32_t src_addr;
106  } ipv4;
107  struct {
109  uint8_t src_addr[16];
111  uint8_t dst_addr[16];
112  } ipv6;
113 };
114 
118  uint64_t ar_base;
120  uint64_t ar_valid_mask;
122  uint64_t hard_life;
124  uint64_t soft_life;
126  uint64_t mib_octs;
128  uint64_t mib_pkts;
131 };
132 
135  uint64_t u64[2];
137  uint8_t iv_dbg[16];
138  struct {
140  uint8_t iv_dbg1[4];
142  uint8_t salt[4];
143 
144  uint32_t rsvd;
146  uint8_t iv_dbg2[4];
147  } s;
148 };
149 
152  union {
153  struct {
154  uint64_t reserved_0_2 : 3;
155  uint64_t address : 57;
156  uint64_t mode : 4;
157  } s;
158  uint64_t u64;
159  } err_ctl;
160 
161  uint64_t esn_val;
162  uint64_t hard_life;
163  uint64_t soft_life;
164  uint64_t mib_octs;
165  uint64_t mib_pkts;
166 };
167 
173  union {
174  struct {
176  uint64_t ar_win : 3;
178  uint64_t hard_life_dec : 1;
180  uint64_t soft_life_dec : 1;
181 
183  uint64_t count_glb_octets : 1;
185  uint64_t count_glb_pkts : 1;
187  uint64_t count_mib_bytes : 1;
188 
190  uint64_t count_mib_pkts : 1;
192  uint64_t hw_ctx_off : 7;
193 
195  uint64_t ctx_id : 16;
196 
198  uint64_t orig_pkt_fabs : 1;
200  uint64_t orig_pkt_free : 1;
202  uint64_t pkind : 6;
203 
204  uint64_t rsvd0 : 1;
206  uint64_t et_ovrwr : 1;
208  uint64_t pkt_output : 2;
210  uint64_t pkt_format : 1;
212  uint64_t defrag_opt : 2;
214  uint64_t x2p_dst : 1;
215 
217  uint64_t ctx_push_size : 7;
218  uint64_t rsvd1 : 1;
219 
221  uint64_t ctx_hdr_size : 2;
223  uint64_t aop_valid : 1;
224  uint64_t rsvd2 : 1;
226  uint64_t ctx_size : 4;
227  } s;
228  uint64_t u64;
229  } w0;
230 
232  union {
233  struct {
235  uint64_t orig_pkt_aura : 20;
236  uint64_t rsvd3 : 4;
238  uint64_t orig_pkt_foff : 8;
240  uint64_t cookie : 32;
241  } s;
242  uint64_t u64;
243  } w1;
244 
246  union {
247  struct {
249  uint64_t valid : 1;
251  uint64_t dir : 1;
252  uint64_t rsvd11 : 1;
253  uint64_t rsvd4 : 1;
255  uint64_t ipsec_mode : 1;
257  uint64_t ipsec_protocol : 1;
259  uint64_t aes_key_len : 2;
260 
262  uint64_t enc_type : 3;
264  uint64_t life_unit : 1;
266  uint64_t auth_type : 4;
267 
269  uint64_t encap_type : 2;
271  uint64_t et_ovrwr_ddr_en : 1;
273  uint64_t esn_en : 1;
275  uint64_t tport_l4_incr_csum : 1;
277  uint64_t ip_hdr_verify : 2;
279  uint64_t udp_ports_verify : 1;
280 
282  uint64_t l3hdr_on_err : 1;
283  uint64_t rsvd6 : 6;
284  uint64_t rsvd12 : 1;
285 
287  uint64_t spi : 32;
288  } s;
289  uint64_t u64;
290  } w2;
291 
293  uint64_t rsvd7;
294 
296  uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN];
297 
299  union {
300  struct {
301  uint32_t rsvd8;
303  uint8_t salt[4];
304  } s;
305  uint64_t u64;
306  } w8;
307  uint64_t rsvd9;
308 
310  union {
311  struct {
312  uint64_t rsvd10 : 32;
314  uint64_t udp_src_port : 16;
316  uint64_t udp_dst_port : 16;
317  } s;
318  uint64_t u64;
319  } w10;
320 
323 
325  uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN];
326 
329 };
330 
336  union {
337  struct {
339  uint64_t esn_en : 1;
341  uint64_t ip_id : 1;
342  uint64_t rsvd0 : 1;
344  uint64_t hard_life_dec : 1;
346  uint64_t soft_life_dec : 1;
347 
349  uint64_t count_glb_octets : 1;
351  uint64_t count_glb_pkts : 1;
353  uint64_t count_mib_bytes : 1;
354 
356  uint64_t count_mib_pkts : 1;
358  uint64_t hw_ctx_off : 7;
359 
361  uint64_t ctx_id : 16;
362  uint64_t rsvd1 : 16;
363 
365  uint64_t ctx_push_size : 7;
366  uint64_t rsvd2 : 1;
367 
369  uint64_t ctx_hdr_size : 2;
371  uint64_t aop_valid : 1;
372  uint64_t rsvd3 : 1;
374  uint64_t ctx_size : 4;
375  } s;
376  uint64_t u64;
377  } w0;
378 
380  union {
381  struct {
382  uint64_t rsvd4 : 32;
384  uint64_t cookie : 32;
385  } s;
386  uint64_t u64;
387  } w1;
388 
390  union {
391  struct {
393  uint64_t valid : 1;
395  uint64_t dir : 1;
396  uint64_t rsvd11 : 1;
397  uint64_t rsvd5 : 1;
399  uint64_t ipsec_mode : 1;
401  uint64_t ipsec_protocol : 1;
402 
404  uint64_t aes_key_len : 2;
405 
407  uint64_t enc_type : 3;
409  uint64_t life_unit : 1;
411  uint64_t auth_type : 4;
412 
414  uint64_t encap_type : 2;
418  uint64_t dscp_src : 1;
420  uint64_t iv_src : 2;
422  uint64_t ipid_gen : 1;
423  uint64_t rsvd6 : 1;
424 
425  uint64_t rsvd7 : 7;
426  uint64_t rsvd12 : 1;
427 
429  uint64_t spi : 32;
430  } s;
431  uint64_t u64;
432  } w2;
433 
435  uint64_t rsvd8;
436 
438  uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN];
439 
442 
444  union {
445  struct {
446  uint64_t rsvd9 : 4;
448  uint64_t ipv4_df_or_ipv6_flw_lbl : 20;
449 
451  uint64_t dscp : 6;
452  uint64_t rsvd10 : 2;
453 
455  uint64_t udp_dst_port : 16;
456 
458  uint64_t udp_src_port : 16;
459  } s;
460  uint64_t u64;
461  } w10;
462 
465 
467  uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN];
468 
471 };
472 
479 };
480 
486  uint64_t compcode : 7;
488  uint64_t doneint : 1;
490  uint64_t uc_compcode : 8;
492  uint64_t rlen : 16;
494  uint64_t spi : 32;
495 
497  uint64_t esn;
498  } cn10k;
499 
503  uint64_t compcode : 8;
505  uint64_t uc_compcode : 8;
507  uint64_t doneint : 1;
508  uint64_t reserved_17_63 : 47;
509 
510  uint64_t reserved_64_127;
511  } cn9k;
512 
514  uint64_t u64[2];
515 };
516 
522  uint16_t param1;
526  uint16_t param2;
527 };
528 
534 struct rte_pmd_cnxk_inl_dev_q;
535 
553 __rte_experimental
554 int rte_pmd_cnxk_hw_sa_read(uint16_t portid, void *sess, union rte_pmd_cnxk_ipsec_hw_sa *data,
555  uint32_t len, bool inb);
573 __rte_experimental
574 int rte_pmd_cnxk_hw_sa_write(uint16_t portid, void *sess, union rte_pmd_cnxk_ipsec_hw_sa *data,
575  uint32_t len, bool inb);
576 
591 __rte_experimental
593 
607 __rte_experimental
609 
623 __rte_experimental
624 int rte_pmd_cnxk_sa_flush(uint16_t portid, union rte_pmd_cnxk_ipsec_hw_sa *sess, bool inb);
625 
633 __rte_experimental
634 struct rte_pmd_cnxk_inl_dev_q *rte_pmd_cnxk_inl_dev_qptr_get(void);
635 
649 __rte_experimental
650 uint16_t rte_pmd_cnxk_inl_dev_submit(struct rte_pmd_cnxk_inl_dev_q *qptr, void *inst,
651  uint16_t nb_inst);
652 
669 __rte_experimental
670 int rte_pmd_cnxk_cpt_q_stats_get(uint16_t portid, enum rte_pmd_cnxk_cpt_q_stats_type type,
671  struct rte_pmd_cnxk_cpt_q_stats *stats, uint16_t idx);
672 
682 __rte_experimental
683 void rte_pmd_cnxk_hw_inline_inb_cfg_set(uint16_t portid, struct rte_pmd_cnxk_ipsec_inb_cfg *cfg);
684 
691 __rte_experimental
692 const char *rte_pmd_cnxk_model_str_get(void);
693 #endif /* _PMD_CNXK_H_ */
__rte_experimental uint16_t rte_pmd_cnxk_inl_dev_submit(struct rte_pmd_cnxk_inl_dev_q *qptr, void *inst, uint16_t nb_inst)
union rte_pmd_cnxk_ipsec_outb_sa::@21 w0
__rte_experimental void rte_pmd_cnxk_hw_inline_inb_cfg_set(uint16_t portid, struct rte_pmd_cnxk_ipsec_inb_cfg *cfg)
__rte_experimental const char * rte_pmd_cnxk_model_str_get(void)
uint64_t ar_winbits[RTE_PMD_CNXK_AR_WINBITS_SZ]
Definition: rte_pmd_cnxk.h:130
union rte_pmd_cnxk_ipsec_inb_sa::@15 w10
__rte_experimental int rte_pmd_cnxk_cpt_q_stats_get(uint16_t portid, enum rte_pmd_cnxk_cpt_q_stats_type type, struct rte_pmd_cnxk_cpt_q_stats *stats, uint16_t idx)
struct rte_pmd_cnxk_ipsec_inb_ctx_update_reg ctx
Definition: rte_pmd_cnxk.h:328
struct rte_pmd_cnxk_ipsec_outb_sa outb
Definition: rte_pmd_cnxk.h:478
uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN]
Definition: rte_pmd_cnxk.h:296
union rte_pmd_cnxk_ipsec_inb_sa::@13 w2
__rte_experimental int rte_pmd_cnxk_hw_sa_write(uint16_t portid, void *sess, union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len, bool inb)
union rte_pmd_cnxk_ipsec_outb_iv iv
Definition: rte_pmd_cnxk.h:441
uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN]
Definition: rte_pmd_cnxk.h:325
__rte_experimental union rte_pmd_cnxk_cpt_res_s * rte_pmd_cnxk_inl_ipsec_res(struct rte_mbuf *mbuf)
union rte_pmd_cnxk_ipsec_outer_ip_hdr outer_hdr
Definition: rte_pmd_cnxk.h:464
uint8_t hmac_opad_ipad[RTE_PMD_CNXK_CTX_MAX_OPAD_IPAD_LEN]
Definition: rte_pmd_cnxk.h:467
#define RTE_PMD_CNXK_AR_WINBITS_SZ
Definition: rte_pmd_cnxk.h:97
union rte_pmd_cnxk_ipsec_outb_sa::@23 w2
union rte_pmd_cnxk_ipsec_outb_sa::@22 w1
__rte_experimental struct rte_pmd_cnxk_inl_dev_q * rte_pmd_cnxk_inl_dev_qptr_get(void)
union rte_pmd_cnxk_ipsec_inb_sa::@11 w0
rte_pmd_cnxk_cpt_q_stats_type
Definition: rte_pmd_cnxk.h:51
uint64_t ipv4_df_src_or_ipv6_flw_lbl_src
Definition: rte_pmd_cnxk.h:416
__rte_experimental int rte_pmd_cnxk_sa_flush(uint16_t portid, union rte_pmd_cnxk_ipsec_hw_sa *sess, bool inb)
union rte_pmd_cnxk_ipsec_inb_sa::@14 w8
struct rte_pmd_cnxk_ipsec_inb_sa inb
Definition: rte_pmd_cnxk.h:476
uint8_t cipher_key[RTE_PMD_CNXK_CTX_MAX_CKEY_LEN]
Definition: rte_pmd_cnxk.h:438
union rte_pmd_cnxk_ipsec_inb_sa::@12 w1
struct rte_pmd_cnxk_ipsec_outb_ctx_update_reg ctx
Definition: rte_pmd_cnxk.h:470
rte_pmd_cnxk_sec_action_alg
Definition: rte_pmd_cnxk.h:22
__rte_experimental int rte_pmd_cnxk_hw_sa_read(uint16_t portid, void *sess, union rte_pmd_cnxk_ipsec_hw_sa *data, uint32_t len, bool inb)
union rte_pmd_cnxk_ipsec_outer_ip_hdr outer_hdr
Definition: rte_pmd_cnxk.h:322
union rte_pmd_cnxk_ipsec_outb_sa::@24 w10
__rte_experimental union rte_pmd_cnxk_ipsec_hw_sa * rte_pmd_cnxk_hw_session_base_get(uint16_t portid, bool inb)